1. Technical Field
This invention generally relates to computer systems, and more specifically relates to the processing of Direct Memory Access (DMA) requests in computer systems that provide a virtual memory environment.
2. Background Art
Many computer systems have a virtual memory environment, where virtual addresses are mapped to physical addresses in memory. One specific type of virtual memory environment defines multiple logical partitions on a single platform, thereby allowing each logical partition to appear from the client perspective to be a separate and unique computer system. In a logically partitioned computer system, there is often a need for I/O devices such as hard disk drives to write to memory. Such transfers between a hard disk drive and memory often occur via a direct memory access (DMA) controller in the bus chipset. Because DMA transfers occur asynchronously with respect to processor events, such a DMA transfer could potentially cause data coherency problems. For example, let's assume the virtual memory manager decides to move data from block A to block B in memory. In the prior art, it is possible for the DMA controller to write to block A before the move from block A to block B is complete. If the write to block A occurs at a location that has already been copied to block B, block B now has stale data, which can result in a bus or system crash. Without a way to assure data coherency in a computer system that includes a DMA controller and a virtual memory system, the computer industry will continue to suffer from potential crashes and other problems due to data coherency problems.